Associate Rotation Engineer - DVT - 2998 Internet & Ecommerce - Wilsonville, OR at Geebo

Associate Rotation Engineer - DVT - 2998

Company Name:
Mentor Graphics
Associate Rotation Engineer - DVT - 2998
Req ID: 2998
Work Location: US - OR, Wilsonville
Posting Title: Associate Rotation Engineer - DVT - 2998
Description
Company: Mentor Graphics
Job Title: Associate Rotation Engineer - DVT - 2998
Job Location: US - OR - Wilsonville
Job Category: College
All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, national origin, protected veteran status, or on the basis of disability
Job Duties:
In this position, you will be involved in a structured Associate Rotation Engineer Training Program. This is a fast-track training program that challenges you to develop the expertise needed to solve difficult technical problems.
Associate Rotational Engineers are members of a team of highly motivated individuals working with customers designing the most complex hardware and software systems in the world and whose applications span the electronics industry. This training program will give you unique insight into our technical marketing and product support divisions as well as our sales organization. Upon successful completion of the training program, you will be eligible to advance into one of these organizations. Post program opportunities include Field Application Engineer, Corporate Applications Engineer and Technical Marketing Engineer positions.
Job
Qualifications:
Requirements: BS or MS in Electrical or Computer Engineering Programming skills in C/C++, Tcl/TK, PERL as well as an understanding of object oriented concepts as applied to a Verification Environment. Coursework/Experience with HDL-based, register-transfer-level (RTL), digital logic design, verification languages, and functional verification methodology, for ASICs and/or FPGAs. This experience/coursework should include some or all of the following: testbench architecture, design and implementation using UVM/OVM/AVM verification methodology, VHDL and/or Verilog HDL simulation, SystemVerilog, Specman/e, Vera and/or PSL and Assertion-Based Verification techniques. Experience in constrained random directed testing, is also desirable. Excellent verbal and written communication skills; very self-motivated and results-oriented. Travel maybe required. Ability to relocate if needed
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Password:Estimated Salary: $20 to $28 per hour based on qualifications.

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